器件名称:
M74HC132
功能描述:
QUAD 2-INPUT SCHMITT NAND GATE
文件大小:
234.94KB 共9页
简 介:
M54HC132 M74HC132 QUAD 2-INPUT SCHMITT NAND GATE . . . . . . . . HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1A (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS HIGH NOISE IMMUNITY VH (TYP.) = 0.9 V AT VCC = 5 V SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS132 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC132F1R M74HC132M1R M74HC132B1R M74HC132C1R DESCRIPTION The M54/74HC132 is a high speed CMOS QUAD 2INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00. The hysterisis characteristics (around 20 % VCC) of all inputs allow slowly changing input signals to be transformed into sharply defined jitter-free output signals. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view) NC = No Internal Connection December 1992 1/9 M54/M74HC132 TRUTH TABLE A L L H H B L H L H Y H H H L IEC LOGIC SYMBOL PIN DESCRIPTION PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Out……
