器件名称:
M74HCT08M1R
功能描述:
QUAD 2-INPUT AND GATE
文件大小:
231.44KB 共9页
简 介:
M54HCT08 M74HCT08 QUAD 2-INPUT AND GATE . . . . . . . HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 A (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS08 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HCT08 is a high speed CMOS QUAD 2-INPUT AND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 2 stages including buffer output, which gives high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HC devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. INPUT AND OUTPUT EQUIVALENT CIRCUIT ORDER CODES : M54HCT08F1R M74HCT08M1R M74HCT08B1R M74HCT08C1R PIN CONNECTIONS (top view) NC = No Internal Connection February 1993 1/9 M54/M74HCT08 TRUTH TABLE A L L H H B L H L H Y L L L H IEC LOGIC SYMBOL PIN DESCRIPTION PIN No 1……
