器件名称:
MC74HC368
功能描述:
Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections
文件大小:
151.96KB 共6页
简 介:
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC74HC368A N SUFFIX PLASTIC PACKAGE 16–LEAD CASE 648–08 D SUFFIX SOIC PACKAGE 16–LEAD CASE 751B–05 DT SUFFIX TSSOP PACKAGE 16–LEAD CASE 948F–01 ORDERING INFORMATION MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT Plastic SOIC TSSOP Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections High–Performance Silicon–Gate CMOS The MC74HC368A is identical in pinout to the LS368. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device is arranged into 2–bit and 4–bit sections, each having its own active–low Output Enable. When either of the enables is high, the affected buffer outputs are placed into high–impedance states. The HC368A has inverting outputs. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 80 FETs or 20 Equivalent Gates PIN ASSIGNMENT OUTPUT ENABLE 1 A0 Y0 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC OUTPUT ENABLE 2 A5 Y5 A4 Y4 A3 Y3 LOGIC DIAGRAM A0 A1 2 4 3 5 Y0 Y1 A1 Y1 A2 Y2 A2 A3 A4 6 10 12 7 9 11 Y2 Y3 Y4 GND FUNCTION TABLE Inputs Output A L H X Y H L Z Enable 1, Enable 2 L L H A5 14 13 Y5 OUTPUT ENABLE 1 OUTPUT ENABLE 2 1 15 PIN 16 = VCC PIN 8 = GND X = don’t care Z = high–i……
