器件名称:
MC74VHC02D
功能描述:
Quad 2-Input NOR Gate
文件大小:
141.29KB 共5页
简 介:
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NOR Gate The MC74VHC02 is an advanced high speed CMOS 2–input NOR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems. High Speed: tPD = 3.6ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 2A (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 40 FETs or 10 Equivalent Gates MC74VHC02 D SUFFIX 14–LEAD SOIC PACKAGE CASE 751A–03 DT SUFFIX 14–LEAD TSSOP PACKAGE CASE 948G–01 M SUFFIX 14–LEAD SOIC EIAJ PACKAGE CASE 965–01 LOGIC DIAGRAM A1 B1 A2 B2 A3 B3 A4 B4 2 1 3 5 4 6 8 10 9 11 13 12 Y4 Y3 Y2 Y=A+B Y1 ORDERING INFORMATION MC74VHCXXD MC74VHCXXDT MC74VHCXXM SOIC TSSOP SOIC EIAJ PIN ASSIGNMENT Y1 A1 B1 Y2 A2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC Y4 B4 A4 Y3 B3 A3 FUNCTION TABLE Inputs A L L H H B L H L H Output Y H L L L B2 GND 6/97 Motorola, Inc. 1997 1 REV 1 ……
