器件名称:
M74HC10B1R
功能描述:
TRIPLE 3-INPUT NAND GATE
文件大小:
232.84KB 共9页
简 介:
M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 A (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS10 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC10F1R M74HC10M1R M74HC10B1R M74HC10C1R DESCRIPTION The M54/74HC10 is a high speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with silicon gate 2 C MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view) NC = No Internal Connection December 1992 1/9 M54/M74HC10 TRUTH TABLE A L X X H B X L X H C X X L H Y H H H L IEC LOGIC SYMBOL PIN DESCRIPTION PIN No 1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage SCHEMATIC CIRCUIT (Per Gate) ABSOLUTE MAXIMUM RATINGS Symbol……
