器件名称:
M74HC243B1R
功能描述:
QUAD BUS TRANSCEIVER 3-STATE
文件大小:
257KB 共11页
简 介:
M54/74HC242 M54/74HC243 QUAD BUS TRANSCEIVER (3-STATE) . . . . . . . . HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 A (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH = 6 mA (MIN.) HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS242/243 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HC242/243 are high speed CMOS QUAD BUS TRANSCEIVER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. The HC242/243 are 3 STATE bi-directional inverting and non-inverting buffers and are intended for two-way asynchronous communication between data buses. They are high drive current outputs which enable high speed operation when driving large bus capacitances. Each device has one active high enable (GBA), and one active low enable (GAB). GBA enables the A outputs and GAB enables the B outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R PIN CONNECTIONS (top view) HC242 HC243 NC = No Internal Connection October 1993 1/11 M54/M74HC242/243 CHIP CARRIER TRUTH TABLE INPUTS ……
