器件名称:
M74HC4094
功能描述:
8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)
文件大小:
575.34KB 共12页
简 介:
M74HC4094 8 BIT SIPO SHIFT LATCH REGISTER (3-STATE) s s s s s s s HIGH SPEED : fMAX = 80 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4094 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4094B1R M74HC4094M1R T&R M74HC4094RM13TR M74HC4094TTR DESCRIPTION The M74HC4094 is an high speed CMOS 8 BIT SIPO SHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. This device consists of an 8 bit shift register and an 8 bit latch with 3 state output buffer. Data is shifted serially trough the shift register on the positive going transition of the clock input signal. The output of the last stage (Qs) can be used to cascade several devices. Data on the Qs output is transferred to a second output (Qs’) on the following negative transition of the clock input signal. The data of each stage of the shift register is provided with a latch, which latches data on the negative going transition of the STROBE input signal. When the STROBE input is held high, data propagates through the latch to a 3-state output buffer. This buffer is enabled when OUTPUT ENABLE input is taken high. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IE……
