器件名称:
M74HCT534C1R
功能描述:
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT374 NON INVERTING - HCT534 INVERTING
文件大小:
267.5KB 共13页
简 介:
M54/74HCT374 M54/74HCT534 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT374 NON INVERTING - HCT534 INVERTING . . . . . . . HIGH SPEED fMAX = 62 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH= 6 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS374/534 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HCT374, M54/74HCT534, are high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3STATE OUTPUTS fabricated with in silicon gate 2 C MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power comsuption. These8-bit D-type flip-flops are controlled by a clock input (CK) and an ouput enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic state that were setup at the D inputs (HCT374) or their complements (HCT534). While the OE input is low, the eight outputs will be in a normal logic state (high or low logic level), and while high level, the outputs will be in a high impedance state. The output control does not affect the internal operation of flip-flops. That is, the old data can PIN CONNECTION (top view) ORDER CODES : M54HCTXXXF1R M74HCTXXXM1R M74HCTXXXB1R M74HCTXXXC1R be retained or the new data can be entered even while the outputs are o……
