器件名称:
MC74HC573ADTR2
功能描述:
Octal 3-State Noninverting Transparent Latch
文件大小:
199.87KB 共8页
简 介:
MC74HC573A Octal 3-State Noninverting Transparent Latch High–Performance Silicon–Gate CMOS The MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched. The HC573A is identical in function to the HC373A but has the data inputs on the opposite side of the package from the outputs to facilitate PC board layout. http://onsemi.com MARKING DIAGRAMS 20 PDIP–20 N SUFFIX CASE 738 1 MC74HC573AN AWLYYWW 1 20 20 Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 A In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 218 FETs or 54.5 Equivalent Gates 20 1 SOIC WIDE–20 DW SUFFIX CASE 751D 1 TSSOP–20 DT SUFFIX CASE 948E HC573A AWLYYWW 20 HC 573A ALYW 1 20 1 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device MC74HC573AN MC74HC573ADW MC74HC573ADWR2 MC74HC573ADT MC74HC573ADTR2 Package PDIP–20 SOIC–WIDE SOIC–WIDE TSSOP–20 TSSOP–20 Shipping 1440 / Box 38 / Rail 1000 / Reel 75 / Rail 2500 / Reel Semiconductor Components Industries, LLC, 2000 1 May, 2000 – Rev. 9 Publication Order Number: MC74HC573A/D MC74HC573……
