器件名称:
MC74HCT373ADWR2
功能描述:
Octal 3State Noninverting Transparent Latch with LSTTLCompatible Inputs
文件大小:
163.05KB 共8页
简 介:
MC74HCT373A Octal 3State Noninverting Transparent Latch with LSTTLCompatible Inputs HighPerformance SiliconGate CMOS The MC74HCT373A may be used as a level converter for interfacing TTL or NMOS outputs to HighSpeed CMOS inputs. The HCT373A is identical in pinout to the LS373. The eight latches of the HCT373A are transparent Dtype latches. While the Latch Enable is high the Q outputs follow the Data Inputs. When Latch Enable is taken low, data meeting the setup and hold times becomes latched. The Output Enable does not affect the state of the latch, but when Output Enable is high, all outputs are forced to the highimpedance state. Thus, data may be latched even when the outputs are not enabled. The HCT373A is identical in function to the HCT573A, which has the input pins on the opposite side of the package from the output pins. This device is similar in function to the HCT533A, which has inverting outputs. Output Drive Capability: 15 LSTTL Loads TTL/NMOSCompatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 mA In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 196 FETs or 49 Equivalent Gates http://onsemi.com MARKING DIAGRAMS 20 PDIP20 N SUFFIX CASE 738 1 20 MC74HCT373AN AWLYYWW 1 20 20 1 SOIC WIDE20 DW SUFFIX CASE 751D 1 TSSOP20 DT SUFFIX CASE 948E HCT373A AWLYYWW 20 HCT 373A ALYW 1 20 1 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Wee……
