器件名称:
74HCT163DB
功能描述:
Presettable synchronous 4-bit binary counter; synchronous reset
文件大小:
86.73KB 共11页
简 介:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Product specication File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specication Presettable synchronous 4-bit binary counter; synchronous reset FEATURES Synchronous counting and loading Two count enable inputs for n-bit cascading Positive-edge triggered clock Synchronous reset Output capability: standard ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT163 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT163 are synchronous presettable binary counters which feature an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock (providing that the set-up and hold time requirements for PE are met). QU……
