器件名称:
74LVQ163MTR
功能描述:
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
文件大小:
366.66KB 共14页
简 介:
74LVQ163 SYNCHRONOUS PRESETTABLE 4-BIT COUNTER s s s s s s s s s s s HIGH SPEED: fMAX = 180 MHz (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 163 IMPROVED LATCH-UP IMMUNITY SOP TSSOP Table 1: Order Codes PACKAGE SOP TSSOP T&R 74LVQ163MTR 74LVQ163TTR DESCRIPTION The 74LVQ163 is a low voltage CMOS SYNCHRONOUS PRESETTABLE COUNTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. It is a 4 bit binary counter with Synchronous Clear. The circuit have four fundamental modes of operation, in order of preference: synchronous reset, parallel load, count-up and hold. Four Figure 1: Pin Connection And IEC Logic Symbols control inputs, Master Reset (CLEAR), Parallel Enable Input (LOAD), Count Enable Input (PE) and Count Enable Carry Input (TE), determine the mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading and allows all outputs to go LOW on the next rising edge of CLOCK. A LOW signal on LOAD overrides counting and allows informatio……
