器件名称:
CD54AC161F
功能描述:
4-BIT SYNCHRONOUS BINARY COUNTERS
文件大小:
155.02KB 共11页
简 介:
CD54AC161, CD74AC161 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS239A – SEPTEMBER 1998 – REVISED APRIL 2000 D D D D D D D Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2 kV ESD Protection per MIL-STD-883, Method 3015 Package Options Include Plastic Small-Outline (M), Standard Plastic (E) and Ceramic (F) DIPs CD54AC161 . . . F PACKAGE CD74AC161 . . . E OR M PACKAGE (TOP VIEW) CLR CLK A B C D ENP GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC RCO QA QB QC QD ENT LOAD description The CD54AC161 and CD74AC161 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that normally are associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform. These devices are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes the outputs to a……
