器件名称:
CD54AC163
功能描述:
4-BIT SYNCHRONOUS BINARY COUNTERS
文件大小:
154.53KB 共11页
简 介:
CD54AC163, CD74AC163 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS299 – APRIL 2000 D D D D D Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Package Options Include Plastic Small-Outline (M), Standard Plastic (E) and Ceramic (F) DIPs CD54AC163 . . . F PACKAGE CD74AC163 . . . E OR M PACKAGE (TOP VIEW) description 9 8 The CD54AC163 and CD74AC163 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform. CLR CLK A B C D ENP GND 1 2 3 4 5 6 7 16 15 14 13 12 11 10 VCC RCO QA QB QC QD ENT LOAD The counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function is synchronous. A low level at th……
