器件名称:
CD54ACT163_08
功能描述:
4-BIT SYNCHRONOUS BINARY COUNTERS
文件大小:
677.44KB 共18页
简 介:
CD54ACT163, CD74ACT163 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS300B – APRIL 2000 – REVISED MARCH 2003 D D D D D Inputs Are TTL-Voltage Compatible Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable CD54ACT163 . . . F PACKAGE CD74ACT163 . . . E OR M PACKAGE (TOP VIEW) description/ordering information The ’ACT163 devices are 4-bit binary counters. 11 6 These synchronous, presettable counters feature 10 7 an internal carry look-ahead for application in 9 8 high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change, coincident with each other, when instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform. The counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function is synchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low after the next low-to-high transition of CLK, ……
