器件名称:
54ABT373
功能描述:
Octal Transparent Latch with TRI-STATE Outputs
文件大小:
357.08KB 共14页
简 介:
54ABT373 Octal Transparent Latch with TRI-STATE Outputs July 1998 54ABT373 Octal Transparent Latch with TRI-STATE Outputs General Description The ’ABT373 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state. n Guaranteed multiple output switching specifications n Output switching specified for both 50 pF and 250 pF loads n Guaranteed simultaneous switching, noise level and dynamic threshold performance n Guaranteed latchup protection n High impedance glitch free bus loading during entire power up and power down n Nondestructive hot insertion capability n Standard Microcircuit Drawing (SMD) 5962-9321801 Features n TRI-STATE outputs for bus interfacing n Output sink capability of 48 mA, source capability of 24 mA Ordering Code Military 54ABT373J-QML 54ABT373W-QML 54ABT373E-QML Package Number J20A W20A E20A 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Package Description 20-Lead Ceramic Dual-In-Line Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100206-2 DS100206-1 Pin Names D0–D7 LE OE O0–O7 Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) TRI-STATE Latch Outputs TRI-STATE is a regis……
