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MC100E131FN

器件名称: MC100E131FN
功能描述: 4-BIT D FLIP-FLOP
文件大小: 104.62KB 共4页
生产厂商: MOTOROLA
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简  介: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4Bit D FlipFlop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (CC) LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE inputs LOW and using CC to clock all four flip-flops. In this case, the CE inputs perform the function of controlling the common clock, to each flip-flop. Individual asynchronous resets are provided (R). Asynchronous set controls (S) are ganged together in pairs, with the pairing chosen to reflect physical chip symmetry. Data enters the master when both CC and CE are LOW, and transfers to the slave when either CC or CE (or both) go HIGH. MC10E131 MC100E131 4-BIT D FLIP-FLOP 1100MHz Min. Toggle Frequency Differential Outputs Individual and Common Clocks Individual Resets (asynchronous) Paired Sets (asynchronous) Extended 100E VEE Range of – 4.2V to – 5.46V 75k Input Pulldown Resistors Pinout: 28-Lead PLCC (Top View) R3 25 CE3 D3 S12 VEE CC S03 D0 26 27 28 1 2 3 4 5 CE0 6 R0 7 D1 8 CE1 9 R1 10 NC 11 VCCO D2 24 CE2 23 R2 22 VCCO 21 Q3 20 Q3 19 18 17 16 15 14 13 12 Q2 Q2 VCC Q1 Q1 Q0 Q0 S03 S12 CC R1 CE1 D1 Function Data Inputs Clock Enables (Individual) Resets Common Clock Sets (paired) True Outputs Inverting Outputs R0 R CE0 D0 D S Q Q Q0 Q0 D S R Q Q Q1 Q1 S D3 CE3 R R3 D2 CE2 R R2 S D Q Q D Q Q Q3 Q3 FN SUFFIX PLASTIC PACKAGE CASE 776-02 LOGIC DIAGRAM Q2 Q……
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