器件名称:
74HC4066PW
功能描述:
Quad bilateral switches
文件大小:
175.98KB 共24页
简 介:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications 74HC/HCT4066 Quad bilateral switches Product specication Supersedes data of 1998 Oct 02 File under Integrated Circuits, IC06 1998 Nov 10 Philips Semiconductors Product specication Quad bilateral switches FEATURES Very low “ON” resistance: 50 (typ.) at VCC = 4.5 V 45 (typ.) at VCC = 6.0 V 35 (typ.) at VCC = 9.0 V Output capability: non-standard ICC category: SSI. GENERAL DESCRIPTION The 74HC/HCT4066 are high-speed Si-gate CMOS devices and are pin compatible with the “4066” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT4066 The 74HC/HCT4066 have four independent analog switches. Each switch has two input/output terminals (nY, nZ) and an active HIGH enable input (nE). When nE is LOW the belonging analog switch is turned off. The “4066” is pin compatible with the “4016” but exhibits a much lower “ON” resistance. In addition, the “ON” resistance is relatively constant over the full input signal range. TYPICAL SYMBOL tPZH/ tPZL tPHZ/ tPLZ CI CPD CS Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): a) PD = CPD × VCC2 × fi + ∑ {(CL + CS) × VCC2 × fo} where: b) fi = input frequency in MHz c) fo = output frequency in MHz d) ∑ {(CL + CS) × VCC2 × fo} = sum of outputs e) CL = output load capacitance in pF f) C……
