器件名称:
74LVQ174
功能描述:
Low Voltage Hex D-Type Flip-Flop with Master Reset
文件大小:
81.51KB 共6页
简 介:
74LVQ174 Low Voltage Hex D-Type Flip-Flop with Master Reset May 1998 74LVQ174 Low Voltage Hex D-Type Flip-Flop with Master Reset General Description The LVQ174 is a high-speed hex D-type flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. Features n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance n Guaranteed incident wave switching into 75 Ordering Code: Order Number 74LVQ174SC 74LVQ174SJ Package Number M16A M16D Package Description 16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC 16-Lead Molded Small Outline Package, SOIC EIAJ Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram Pin Assignment for SOIC JEDEC and EIAJ DS011353-1 IEEE/IEC DS011353-3 Pin Descriptions Pin Names D0–D5 CP MR Q0–Q5 DS011353-2 Description Data Inputs Clock Pulse Input Master Reset Input Outputs 1998 Fairchild Semiconductor Corporation DS011353 www.fairchildsemi.com Functional Description The LVQ174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip-flops. Each D input’s st……