器件名称:
CD54ACT280F3A
功能描述:
9-Bit Odd/Even Parity Generator/Checker
文件大小:
404.95KB 共12页
简 介:
CD54/74AC280, CD54/74ACT280 Data sheet acquired from Harris Semiconductor SCHS250A August 1998 - Revised May 2000 9-Bit Odd/Even Parity Generator/Checker data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data inputs is HIGH. Parity checking for words larger than nine bits can be accomplished by tying the ∑E output to any input of an additional ’AC280, ’ACT280 parity checker. Features Buffered Inputs Typical Propagation Delay - 10ns at VCC = 5V, TA = 25oC, CL = 50pF Exceeds 2kV ESD Protection per MIL-STD-883, Method 3015 SCR-Latchup-Resistant CMOS Process and Circuit Design Speed of Bipolar FAST/AS/S with Signicantly Reduced Power Consumption Balanced Propagation Delays AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply ±24mA Output Drive Current - Fanout to 15 FAST ICs - Drives 50 Transmission Lines Ordering Information PART NUMBER CD54AC280F3A CD74AC280E CD74AC280M CD54ACT280F3A CD74ACT280E CD74ACT280M NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information. TEMP. RANGE (oC) -55 to 125 0 to 70oC, -40 to 85, -55 to 125 0 to 70oC, -40 to 85, -55 to 125 -55 to 125 0 to 70oC, -40 to 85, -55 to 125 0 to 70oC, -40 to 85, -55 to 125 14 Ld SOIC PACKAGE 14 Ld CER……
