器件名称:
CD54AC164
功能描述:
8-Bit Serial-In/Parallel-Out Shift Registers
文件大小:
9.73KB 共1页
简 介:
S E M I C O N D U C T O R CD54AC164/3A CD54ACT164/3A 8-Bit Serial-In/Parallel-Out Shift Registers Functional Diagram 1 DS1 2 DS2 3 4 5 6 10 11 12 13 9 8 GND = 7 VCC = 14 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 June 1997 COMPLETE DATA SHEET COMING SOON! Description The CD54AC164/3A and CD54ACT164/3A are 8-bit serialin/parallel-out shift registers with asynchronous reset that utilize the Harris Advanced CMOS Logic technology. Data are shifted on the positive edge of the clock (CP). A LOW on the Master Reset (MR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (DS1 and DS2) are provided; either one can be used as a Data Enable control. The CD54AC164/3A and CD54ACT164/3A are supplied in 14 lead dual-in-line ceramic packages (F sufx). ACT INPUT LOAD TABLE INPUT DS1, DS2 MR CP NOTE: 1. Unit load is ICC limit specied in DC Electrical Specications Table, e.g., 2.4mA Max at +25oC. UNIT LOAD (NOTE 1) 0.5 0.74 0.71 MR CP Absolute Maximum Ratings DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±50mA DC Output Source or Sink Current, Per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±50mA DC VCC or GND Current, ICC or IGND For Up to ……
