器件名称:
CD54HC4094
功能描述:
High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
文件大小:
512.8KB 共18页
简 介:
CD54HC4094, CD74HC4094, CD74HCT4094 Data sheet acquired from Harris Semiconductor SCHS211D November 1997 - Revised October 2003 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State Two serial outputs are available for cascading a number of these devices. Data is available at the QS1 serial output terminal on positive clock edges to allow for high-speed operation in cascaded system in which the clock rise time is fast. The same serial information, available at the QS2 terminal on the next negative clock edge, provides a means for cascading these devices when the clock rise time is slow. Features Buffered Inputs [ /Title (CD74H C4094, CD74H CT4094 ) /Subject (High Speed CMOS Logic 8- Separate Serial Outputs Synchronous to Both Positive and Negative Clock Edges For Cascading Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PART NUMBER CD54HC4094F3A CD74HC4094E CD74HC4094M CD74HC4094MT CD74HC4094M96 CD74HC4094NSR CD74HC40……
