器件名称:
CD54HC597_08
功能描述:
High-Speed CMOS Logic 8-Bit Shift Register with Input Storage
文件大小:
518.13KB 共18页
简 介:
CD54HC597, CD74HC597, CD74HCT597 Data sheet acquired from Harris Semiconductor SCHS191C January 1998 - Revised October 2003 High-Speed CMOS Logic 8-Bit Shift Register with Input Storage Description The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin-compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A “low” on the parallel load input (PL) shifts parallel stored data asynchronously into the shift register. A “low” master input (MR) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL is high. Features Buffered Inputs [ /Title (CD74 HC597 , CD74 HCT59 7) /Subject (High Speed CMOS Asynchronous Parallel Load Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PART NUMBER CD54HC597F3A CD74HC597E CD74HC597M CD……