器件名称:
CD54HCT165M96
功能描述:
High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register
文件大小:
418.15KB 共15页
简 介:
CD54HC165, CD74HC165, CD54HCT165, CD74HCT165 Data sheet acquired from Harris Semiconductor SCHS156C February 1998 - Revised October 2003 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register Description The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift registers with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When the PL is HIGH, data enters the register serially at the DS input and shifts one place to the right (Q0→Q1→Q2, etc.) with each positive-going clock transition. This feature allows parallelto-serial converter expansion by typing the Q7 output to the DS input of the succeeding device. For predictable operation the LOW-to-HIGH transition of CE should only take place while CP is HIGH. Also, CP an d CE should be LOW before the LOW-to-HIGH transition of PL to prevent shifting the data when PL goes HIGH. Features Buffered Inputs [ /Title (CD74H C165, CD74H CT165) /Subject (High Speed CMOS Logic 8Bit Parallel- Asynchronous Parallel Load Complementary Outputs Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V ……
