器件名称:
DM74ALS165M
功能描述:
8-Bit Parallel In/Serial Out Shift Register
文件大小:
63.84KB 共6页
简 介:
DM74ALS165 8-Bit Parallel In/Serial Out Shift Register January 1986 Revised February 2000 DM74ALS165 8-Bit Parallel In/Serial Out Shift Register General Description The DM74ALS165 is an 8-bit serial register that, when clocked, shifts the data toward serial output, QH. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the SH/LD input. The DM74ALS165 also features a clock inhibit function and a complemented serial output, QH. Clocking is accomplished by a LOW-to-HIGH transition of the CLK input while SH/LD is held HIGH and CLK INH is held LOW. The functions of the CLK and CLK INH (clock inhibit) inputs are interchangeable. Since a LOW CLK input and a LOW-to-HIGH transition of CLK INH will also accomplish clocking, CLK INH should be changed to the high level only while the CLK input is HIGH. Parallel loading is inhibited when SH/LD is held HIGH. The parallel inputs to the register are enabled while SH/LD is LOW independently of the levels of CLK, CLK INH, or SER inputs. Features s Complementary outputs s Direct overriding load (data) inputs s Gated clock inputs s Parallel-to-serial data conversion Ordering Code: Order Number DM74ALS165M DM74ALS165N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suff……
