器件名称:
M74HC251M1R
功能描述:
8 BIT SIPO SHIFT REGISTER
文件大小:
249.81KB 共11页
简 介:
M54HC251 M74HC251 8 BIT SIPO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 14 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C 6 V HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS251 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC251F1R M74HC251M1R M74HC251B1R M74HC251C1R DESCRIPTION The M54/74HC251 is a high speed CMOS 8-CHANNEL MULTIPLEXER (3-STATE) fabricated in silicon 2 gate C MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This multiplexer features both true (Y) and complement (W) outputs as well as STROBE input. The STROBE must be a low logic level to enable this device. When the STROBE input is high, both outputs are in the high impedance state. When enabled, address information on the data select inputs determines which data input is routed to Y and W. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTIONS (top view) INPUT AND OUTPUT EQUIVALENT CIRCUIT NC = No Internal Connection February 1993 1/11 M54/M74HC251 TRUTH TABLE INPUTS C X L L L L H H H H X: Don’t Care Z: HIGH Impedance OUTPUS A X L H L H L H L H STROBE S H L L……