器件名称:
M74HC597RM13TR
功能描述:
8 BIT LATCH/SHIFT REGISTER
文件大小:
408.14KB 共14页
简 介:
M74HC597 8 BIT LATCH/SHIFT REGISTER s s s s s s s HIGH SPEED : fMAX = 50 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 597 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC597B1R M74HC597M1R T&R M74HC597RM13TR M74HC597TTR DESCRIPTION The M74HC597 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. This devices comes in a 16-pin package and consist of an 8-bit storage latch feeding a parallel in, serial out 8-bit shift register. Both the storage register and shift register have positive edge triggered clocks. The shift register also has direct load (from storage) and clear inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/14 M74HC597 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 9 10 11 12 13 10 15, 1, 2, 3, 4, 5, 6, 7 8 16 SYMBOL QH’ SCLR SCK RCK SLOAD SI A to H GND Vcc NAME AND FUNCTION Serial Data Outputs Asynchronous Reset Input (Active LOW) Shift Clock Input (LOW to HIGH Edge-triggered) Storage Clock Input (LOW to HIGH Edge-triggered) Parallel Data Input (Active Low) Serial Data Input Parallel Data Inputs Ground (0V) Posi……
