器件名称:
M74HCT164B1R
功能描述:
8 BIT SIPO SHIFT REGISTER
文件大小:
252.98KB 共12页
简 介:
M54HCT164 M74HCT164 8 BIT SIPO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 20 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL = 4 mA (MIN.) SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH = 4 mA (MIN) COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS164 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HCT164F1R M74HCT164M1R M74HCT164B1R M74HCT164C1R DESCRIPTION The M54/74HCT164 is a high speed CMOS 8 BIT SIPO SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The HCT164 is an 8 bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B), either of these inputs can be used as an active high enable for data entry through the other input. An unused input must be high, or both inputs connected together. Each low-to-high transition on the clock input shifts data one place to the right and enters into QA, the logic NAND of the two data inputs (A B), the data that existed before the rising clock edge. A low level on the clear input overrides all other inputs and clears the register asynchronously, forcing all Q outputs low. All inputs……
