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Renesas V850ES-Jx3 移动心电图(ECG)解决方案

作者: 时间:2012-08-28 来源:网络 收藏

A/D converter: 10-bit resolution: 5/6/10 channels

D/A converter: 8-bit resolution: 0/1 channels

DMA controller: 4 channels

DCU (debug control unit): JTAG interface

Clock generator: During main clock or subclock operation

7-level CPU clock (fXX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, fXT)

Clock-through mode/PLL mode selectable

Internal oscillator clock: 220 kHz (TYP.)

Power-save functions:

HALT/IDLE1/IDLE2/STOP/low-voltage STOP/subclock/sub-IDLE/

low-voltage subclock/low-voltage sub-IDLE mode

Package: V850ES/JC3-L

40-pin plastic WQFN (6 6)

48-pin plastic LQFP (fine pitch) (7 7)

48-pin plastic WQFN (7 7)

V850ES/JE3-L

64-pin plastic LQFP (fine pitch) (8 8)

64-pin plastic FBGA (5 5) (D70F3807, 70F3808, 70F3840 only)

Power supply voltage: VDD = 2.2 V to 3.6 V (5 MHz)

VDD = 2.7 V to 3.6 V (20 MHz)

Application Fields

Digital cameras, electrical power meters, mobile terminals, digital home electronics, other consumer devices

V850ES/JC3-L 系列产品列表(1):
20110815114616330.gif

本文引用地址://m.amcfsurvey.com/article/198893.htm


V850ES/JC3-L 系列产品列表(2):
20110815114616581.gif


V850ES/JE3-L 系列产品列表(在开发):
20110815114616247.gif



20110815114620443.gif


关键词:RenesasES-JxECG

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