This application note provides a discussion of strategies and representative calculations for handling single event upsets (SEUs) with an emphasis on reliability when addressing these low probability events. This application note also introduces an SEU controller macro that can be included in any Virtex®-5 FPGA design to implement an SEU detection and correction scheme.
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SEU Strategies for Virtex-5 Devices
关键词: Strategies Virtex-5 Devic
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