EEPW论坛

module LED3(clk,rst_n,LED);
//programmed by haohaolinux
input clk,rst_n;
output [7:0] LED;

reg [7:0] LED;
reg [23:0] cnt;

//24 bit counter
always@(posedgeclk or negedge rst_n)
if(!rst_n)
cnt <= 24'h0;
else if(cnt == 24'hffffff)
cnt <= 24'h0;
else
cnt <= cnt+1;

always@(posedgeclk or negedge rst_n)
if(!rst_n)
LED <= 8'hff;
else if(cnt == 24'hffffff)
begin
LED <= {LED[6:0],~LED[7]};
if(LED == 8'h00)
LED <= 8'hff;
end
else
LED <= LED;

endmodule