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什么是LFSR,What is an LFSR?

The purpose of this article is to explain what a Linear Feedback Shift Register (LFSR) and a Parallel Signature Analyzer (PSA)
are and how to use them to test a TI Application-Specific Integrated Circuit (ASIC) using SCOPEE cells. This article begins
with a description of an LFSR, goes into Pseudorandom Pattern Generation (PRPG) and fault grading, describes a PSA, and,
last, shows how to implement the PSA and LFSR functions using SCOPE boundary-scan cells, which are compatible with
IEEE 1149.1.
LFSR
An LFSR is a shift register that, when clocked, advances the signal through the register from one bit to the next most-significant
bit (see Figure 1). Some of the outputs are combined in exclusive-OR configuration to form a feedback mechanism. A linear
feedback shift register can be formed by performing exclusive-OR on the outputs of two or more of the flip-flops together and
feeding those outputs back into the input of one of the flip-flops as shown in Figure 2.

Pseudorandom Pattern Generation
Linear feedback shift registers make extremely good pseudorandom pattern generators. When the outputs of the flip-flops are
loaded with a seed value (anything except all 0s, which would cause the LFSR to produce all 0 patterns) and when the LFSR
is clocked, it will generate a pseudorandom pattern of 1s and 0s. Note that the only signal necessary to generate the test patterns
is the clock.