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高速总线的终端匹配技术

资料介绍
高速总线的终端匹配技术EDN

DESIGN FEATURE

Termination techniques for high-speed buses
KARTHIK ETHIRAJAN AND JOHN NEMEC, PHD, CALIFORNIA MICRO DEVICES
control lines; an increase in As bus speeds continue to clock and signal jitter; and increase, system designers an increase in total emismust seriously consider the Choosing the proper bus-termination sions from the pc board. An issues of signal propagation technique―parallel, series, Thevenin, ac, or effective way to reduce the and quality. Concerns previabove transmission-line ously relegated to the analog diode-based―is critical to digital-system effects is to properly termiworld, such as transmissionperformance. Improper termination can lead nate these lines. line effects, now determine to ringing and stair-stepping, which in turn Common passive-termiwhether
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高速总线的终端匹配技术
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