器件名称:
CD54HCT10
功能描述:
High-Speed CMOS Logic Triple 3-Input NAND Gate
文件大小:
261.21KB 共11页
简 介:
CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 Data sheet acquired from Harris Semiconductor SCHS128C August 1997 - Revised September 2003 High-Speed CMOS Logic Triple 3-Input NAND Gate Description The ’HC10 and ’HCT10 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin compatible with the standard LS logic family. [ /Title (CD74 HC10, CD74 HCT10 ) /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- Features Buffered Inputs Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PART NUMBER CD54HC10F3A CD54HCT10F3A CD74HC10E CD74HC10M CD74HC10……
