器件名称:
M74HC280
功能描述:
9 BIT PARITY GENERATOR
文件大小:
303.74KB 共9页
简 介:
M74HC280 9 BIT PARITY GENERATOR s s s s s s s HIGH SPEED : tPD = 22ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 280 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC280B1R M74HC280M1R T&R M74HC280RM13TR M74HC280TTR DESCRIPTION The M74HC280 is an high speed CMOS 9-BIT PARITY GENERATOR fabricated with silicon gate C2MOS technology. It is composed of nine data inputs (A to I) and odd/ even parity outputs (ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high level input is odd, ΣODD output is kept high and ΣEVEN output low. Conversely, when the output is even, ΣEVEN output is kept high and ΣODD low. The IC generates either odd or even parity making it flexible application. The word-length capability is easily expanded by cascading. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/9 M74HC280 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 5, 6 8, 9, 10, 11, 12, 13, 1, 2, 4 3 7 14 SYMBOL ΣEVEN ΣΟDD A to I NAME AND FUNCTION Parity Outputs Data Inputs NC GND VCC No Connection Ground (0V) Positive Supply Voltage TRUTH TABLE NUMBER OF INPUTS A ……
